Home | Legals | Sitemap | KIT
Damschen

M.Sc. Marvin Damschen

Scientist
room: B2-314.4
phone: +49 721 608-46323
fax: +49 721 608-43962
marvin damschenFps6∂kit edu


Haid-und-Neu-Str. 7
Bldg. 07.21
76131 Karlsruhe


Short Bio

Marvin Damschen joined the Chair for Embedded Systems in October 2014 as a research assistant. He received a B.Sc. degree - with distinction - and M.Sc. degree - with distinction - in Computer Science with a minor in Mathematics from the University of Paderborn in 2012 and 2014, respectively. Currently, he is pursuing his PhD under the supervision of Prof. Dr. Jörg Henkel.

 

Publications

Journals
  • Marvin Damschen, Lars Bauer, Jörg Henkel
    CoRQ: Enabling Runtime Reconfiguration under WCET Guarantees for Real-Time Systems
    in IEEE Embedded Systems Letters (ESL), (accepted).
  • Marvin Damschen, Lars Bauer, Jörg Henkel
    Extending the WCET Problem to Optimize for Runtime-Reconfigurable Processors
    in ACM Transactions on Architecture and Code Optimization (TACO), Vol.13, Issue 4, Article No.45, DOI , PDF, Dec. 2016.
  • Stefan Wildermann, Michael Bader, Lars Bauer, Marvin Damschen, Dirk Gabriel, Michael Gerndt, Michael Glaß, Jörg Henkel, Johny Paul, Alexander Pöppl, Sascha Roloff, Tobias Schwarzer, Gregor Snelting, Walter Stechele, Jürgen Teich, Andreas Weichslgartner, Andreas Zwinkau
    Invasive Computing for Timing-Predictable Stream Processing on MPSoCs
    in it – Information Technology (IT), Band 58, Heft 6, DOI, PDF, Dez. 2016.
  • Marvin Damschen, Lars Bauer, Jörg Henkel
    Timing Analysis of Tasks on Runtime Reconfigurable Processors
    in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol.25, Issue 1, pp. 294-307, DOI, PDF, Jan. 2017.

 

Conferences
  • Lars Bauer, Artjom Grudnitsky, Marvin Damschen, Srinivas Rao Kerekare, Jörg Henkel
    Floating Point Acceleration for Stream Processing Applications in Dynamically Reconfigurable Processors
    in IEEE Symposium on Embedded Systems for Real-time Multimedia (ESTIMedia’15)
    Amsterdam, The Netherlands, October 8-9, 2015.
  • M. Damschen, H. Riebler, G. Vaz, and C. Plessl
    Transparent offloading of computational hotspots from binary code to Xeon Phi
    in IEEE/ACM 18th Design, Automation and Test in Europe Conference (DATE'15)
    EDA Consortium, Grenoble, France, Pages 1078–1083, March 9-13, 2015.

 

Workshops
  • M. Damschen and C. Plessl
    Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores
    in The 5th International Workshop on Adaptive Self-tuning Computing Systems (ADAPT'15)
    Amsterdam, The Netherlands, January 21, 2015.

 

Theses

  • Master Thesis:
    Easy-to-use on-the-fly binary program acceleration on many-cores PDF
  • Bachelor Thesis:
    Concurrent shared memory access for Android applications and real-time processes PDF

 

Student Theses

 

NameType of workTitelMentor
Maier, EduardDiploma thesisReconfigurable Fabric Sharing for Multi-Core ArchitecturesDamschen, Marvin / Bauer, Lars
Ben Ammar, KarimBachelor thesisIoT coffee machineSamie, Farzad / Damschen, Marvin / Bauer, Lars
Sader, ThomasDiploma thesisThe Role of BCET Estimations in WCET OptimizationsDamschen, Marvin
Vutov, PeterBachelor thesisImplementierung eines Linux Treibers zum Ausführen und Rekonfigurieren von Beschleunigern in einem Mixed-Criticality SystemDamschen, Marvin

Abbreviation: D - Diploma Thesis, M - Master Thesis, S - Student Work, B - Bachelor Thesis.


TopicType of workMentor
Analyse von Rekonfigurierbaren Mehrkernsystemen für Echtzeitkritische Anwendungen ( PDF )M/BDamschen, Marvin / Bauer, Lars
Energieeffizienzbewertung eines rekonfigurierbaren Prozessors ( PDF )B/MDamschen, Marvin / Bauer, Lars
Entwicklung von Spezialbefehlen zur Lösung von Shallow Water Equations ( PDF )BDamschen, Marvin / Bauer, Lars
Area and Energy evaluation of a combined ASIC+FPGA implementation of a reconfigurable processor ( PDF )BDamschen, Marvin / Bauer, Lars
Design and Implementation of hardware accelerators for Heterogeneous Reconfigurable Processors ( PDF )BDamschen, Marvin / Bauer, Lars
Objekterkennung auf einem rekonfigurierbaren System ( PDF )MDamschen, Marvin / Bauer, Lars
Simulation eines rekonfigurierbaren Mehrkernsystems ( PDF )M/BDamschen, Marvin / Bauer, Lars
Implementierung eines Linux Treibers zum Ausführen und Rekonfigurieren von Beschleunigern in einem Mixed-Criticality System ( PDF )BDamschen, Marvin / Bauer, Lars
Name Type of work TitelMentor Completion date
Blankertz, MatthiasDiploma thesisExtending the i-Core architecture for pipelined floating-point acceleratorsDamschen, Marvin / Bauer, Lars2017-03-31
Rapp, MartinMaster thesisA Mixed Criticality Architecture with Reconfigurable AcceleratorsDamschen, Marvin / Bauer, Lars2016-12-20
Eckhart, ArturBachelor thesisA Command-Driven Reconfiguration Controller for Hard Real-Time SystemsDamschen, Marvin / Bauer, Lars2016-08-12
Middelschulte, LeifMaster thesisExtending a WCET Estimation Tool for Runtime Reconfigurable ProcessorsDamschen, Marvin2016-07-14
Typke, MarcMaster thesisA SystemC/TLM-based Simulator for a Reconfigurable Heterogeneous Multi-core SystemDamschen, Marvin2016-04-15