Short Bio

Sajjad Hussain earned Bachelor of Engineering (B.E.) in Computer Systems Engineering in 2004 from Mehran University of Engineering and Technology (MUET), Pakistan and Master of Science (M.S.) in Systems Engineering in 2006 from Pakistan Institute of Engineering and Applied Sciences (PIEAS), Pakistan.
Currently, He is pursuing PhD degree at Chair for Embedded Systems (CES), Karlsruhe Institute of Technology (KIT) Germany.

Awards

2014 - Scholarship awarded by Higher Education Commission Pakistan for PhD
2004 - Fellowship granted by Pakistan Institute of Engineering and Applied Sciences (PIEAS), Islamabad, Pakistan for M.S.
2000 – 2^nd Position in Entrance Examination for Bachelor of Engineering

Publications

Conferences
Sajjad Hussain, Muhammad Shafique and Jörg Henkel Thermal-Awareness in a Soft Error Tolerant Architecture (IP) in IEEE/ACM 22nd Design, Automation and Test in Europe Conference (DATE'19), Florence, Italy, DOI, PDF, Mar 25-29 2019.
Sajjad Hussain, Muhammad Shafique and Jörg Henkel A Fine-Grained Soft Error Resilient Architecture under Power Considerations (IP) in IEEE/ACM 22nd Design, Automation and Test in Europe Conference (DATE'19), Florence, Italy, DOI, PDF, Mar 25-29 2019.

Student Theses

Name	Type of work	Title	Mentor
Bin Asif, Abdullah	Master thesis	Enhancing Hardware Security for Reconfigurable Devices	Sajjad Hussain
Ourgani, Ayoub	Bachelor thesis	ML-Based Detection of Malicious Modifications in the FPGA	Sajjad Hussain

Name	Type of work	Title	Mentor	Completion date
Oğuz, Yiğit	Bachelor thesis	Hardware Trojan detection during FPGA design Flow Leveraging Machine Learning	Hussain, Sajjad	2023-03-03
Arif, Mehwish	Master thesis	Designing an Approximate ASIP for Machine Learning	Hussain, Sajjad	2019-08-01