The problems faced by the VLSI design community can be divided into three broad categories. The first is the invention of logic to solve a problem. This is perhaps the hardest problem as it has so far defied any automation. Frederik P Brooks in 1987 underscored this in an article in IEEE Computer with the title “Essence and Accidents of Software Engineering. No Silver Bullet”. Brooks argued that inventing the idea is the essential problem, all progress in design methods only takes care of the accidental problems. These arguments, though made for software engineering, applies largely to VLSI engineering as well. While this argument has largely gone unchallenged, it is perhaps time to rethink – is there a silver bullet? We argue that replacing manually inventing the logic – algorithms and data structures – by brain like learning machines holds the promise to be the silver bullet. Though, at this stage, this is far from a foregone conclusion, but there is a glimmer of hope.
The second problem is the unsustainably large engineering cost of VLSI design that is suffocating innovation and introduction of new product categories that requires orders of magnitude greater computational and silicon efficiencies that can only be achieved by custom hardware design. This recipe goes against the current state-of-the-practice software centric accelerator rich platform based design style that has not only failed to reduce the engineering cost but also delivers sub-optimal designs and does not scale with technology trends.
As a solution, we propose raising the physical design platform from the present day boolean level standard cells to micro-architectural level SiLago (Silicon Large Grain Objects) blocks as the atomic physical design building blocks and introduce a grid based structured layout scheme as a new physical design discipline to compose arbitrary designs by abutting SiLago blocks to eliminate the logic and physical syntheses for the end user. We call this the SiLago method and show that it provides 2-3 orders more efficient synthesis from application level compared to the standard cell based commercial design flows with a modest loss in design quality.
The SiLago method also holds promise to solve the third problem of lowering the cost of making masks. This can be done because in the SiLago method, the mask becomes composable in terms of the component SiLago block masks. As there are finite number of SiLago block types that can have only a finite number of neighboring SiLago block types, it is possible to store as pre-determined patterns of the SiLago block types in a library that are corrected for all types of lithographic impairments. Masks for arbitrary SiLago designs can then be composed using these component SiLago block masks.
Ahmed Hemani is Professor in Electronic Systems Design at School of ICT, KTH, Kista, Sweden. His current areas of research interests are massively parallel architectures and design methods and their applications to scientific computing and autonomous embedded systems inspired by brain. In past he has contributed to high-level synthesis – his doctoral thesis was the basis for the first high-level synthesis product introduced by Cadence called visual architect. He has also pioneered the Networks-on-chip concept and has contributed to clocking and low power architectures and design methods. He has extensively worked in industry including National Semiconductors, ABB, Ericsson, Philips Semiconductors, Newlogic. He has also been part of three start-ups.