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Exploiting Error-Awareness in System Design

Exploiting Error-Awareness in System Design
Prof. Fadi J Kurdahi

Center for Embedded Computer System, University of California, Irvine, CA, USA


Room "New York" in Forschungszentrum Informatik (FZI), Haid-und-Neu-Str. 10, Karlsruhe

Date: Tuesday, October 30th, 10:00

This talk addresses this notion of error-awareness across multiple abstraction layers - application, architectural platform, and technology - for next generation SoCs. The intent is to allow exploration and evaluation of a large, previously invisible design space exhibiting a wide range of power, performance, and cost attributes. To achieve this one must synergistically bring together expertise at each abstraction layer: in communication/multimedia applications, SoC architectural platforms, and advanced circuits/technology, in order to allow effective co-design across these abstraction layers. 
As an example, one may investigate methods to achieve acceptable QoS at different abstraction levels as a result of intentionally allowing errors to occur inside the hardware with the aim of trading that off for lower power, higher performance and/ or lower cost. Such approaches must be validated and tested in real applications. An ideal context for the convergence of such applications are handheld multimedia communication devices in which a WCDMA modem and an H.264 encoder must co-exist, potentially with other applications such as imaging. These applications have a wide scope, execute in highly dynamic environments and present interesting opportunities for tradeoff analysis and optimization. We also demonstrate how error awareness can be exploited at the architectural platform layer through the implementation of error tolerant caches that can operate at very low supply voltage. 

Short Bio:
Fadi Kurdahi received his PhD from the University of Southern California in 1987. Since then, he has been a faculty at the Department of Electrical & Computer Engineering at UCI, where he conducts research in the areas of Computer Aided Design of VLSI circuits, high-level synthesis, and design methodology of large scale systems, and serves as the Director for the Center for Embedded Computer Systems (CECS), comprised of world-class researchers in the general area of Embedded Systems. 
He served on numerous editorial boards, and was program chair, general chair or on program committees of several workshops, symposia and conferences in the area of CAD, VLSI, and system design. 
He received the best paper award for the IEEE Transactions on VLSI in 2002, the best paper award in 2006 at ISQED, and four other distinguished paper awards at DAC, EuroDAC, ASP- DAC and ISQED. He also received the Distinguished Alumnus award from this Alma Mater, the American University of Beirut in 2008. He is a Fellow of the IEEE and the AAA.