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Dependability Challenges at the Device and Circuit Level

Dependability Challenges at the Device and Circuit Level
Dr. Sani Nassif

IBM Research at Austin, US


Room H 120 Technologiefabrik

Date: Monday May 13th

Defects, Manufacturing Uncertainty, Wear-out and Design Bugs all conspire to reduce the dependability of integrated circuits. These phenomena appear at different parts of the IC design, fabrication, and use lifetime. This talk will review the various sources of dependability problems at the device and circuit levels, show trends established in recent technology nodes, and discuss various responses from the technology and design development communities.

Short Bio:
Sani Nassif, IBM, received his PhD from Carnegie-Mellon university in the eighties. He worked for ten years at Bell Laboratories on various aspects of design and technology coupling including device modeling, parameter extraction, worst case analysis, design optimization and circuit simulation. He joined the IBM Austin Research Laboratory in January 1996 where he is presently responsible for new initiatives in the "Smarter Planet" area, formed by applying VLSI principles to other areas of research such as hydrology, energy, pollution and medicine. Sani is an IEEE Fellow, a member of IBM's Academy, and an IBM Master Inventor with more than 50 patents.


Pictures of the talk (click on image to enlarge):