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IEEE Design&Test Vol. 33, Issue 2 (March/April) is released

IEEE Design&Test Vol. 33, Issue 2 (March/April) is released
Date: March 1st, 2016
Design & Test

Magazine
Volume 33, Issue 2 (March/April)

Highlights
Special Issue on "Advances in 3-D Integrated Circuits, Systems, and CAD Tools — Part 2"  
Perspective by Vivek De, Intel, on "Energy-Efficient Computing in Nanoscale CMOS" (Open Access)
Tutorial on "The Changing Computing Paradigm With Internet of Things: A Tutorial Introduction" (Open Access)

March/April 2016 Content


From the EIC
Three-Dimensional Integrated Circuits
  View full article (PDF) here.

Special Issue on Advances in 3-D Integrated Circuits, Systems, and CAD Tools — Part 2
Guest Editors' Introduction: Advances in 3-D Integrated Circuits, Systems, and CAD Tools — Part 2
  View full article (PDF) here.
Delay Characterization and Testing of Arbitrary Multiple-Pin Interconnects
  Detection of delay faults in 3-D interconnects is crucial for building reliable 3-D ICs. This paper presents a test methodology based on a globalring structure with a variable output thresholding technique ... read more.
View full article (PDF) here.
High-Frequency Temperature-Dependent Through-Silicon-Via (TSV) Model and High-Speed Channel Performance for 3-D ICs
  Noise coupling through the substrate or silicon interposer among adjacent TSVs has a significant impact on the signal integrity of the TSVs. Since resistance and capacitance are dependent on temperature ... read more.
View full article (PDF) here.
Configurable Cubical Redundancy Schemes for Channel-Based 3-D DRAM Yield Improvement
  Three-dimensional stacked memory stacking logic and memory dies are one of the most promising 3-D integration applications. This paper proposes two memory redundancy schemes to ... read more.
View full article (PDF) here.
Thermoelectric Codesign of 3-D CPUs and Embedded Microfluidic Pin-Fin Heatsinks
  Microfluidic cooling is considered an effective cooling method suitable for 3-D ICs. However, TSVs are placed in pin fins and coolant flows in between pin fins, so inserting more pin fins to increase ... read more.
View full article (PDF) here.

General Interest Papers
An Optimization Platform for Digital Predistortion of Power Amplifiers
  The article introduces an integrated hardware/software codesign and test platform for the digital predistortion and power amplifier blocks of radiofrequency transceivers. The platform allows ... read more.
View full article (PDF) here.
Variability and Reliability Awareness in the Age of Dark Silicon
  Ability to supply more transistors per chip is outpacing improvements in cooling and power delivery. The result is operation that selectively powers on or off subsets of transistors. This paper suggests ... read more.
View full article (PDF) here.

Departments
Energy-Efficient Computing in Nanoscale CMOS
  Open Access Article (PDF) here.
The Changing Computing Paradigm With Internet of Things: A Tutorial Introduction
  Open Access Article (PDF) here.
Report of Embedded Systems Week (ESWEEK) 2015
  Open Access Article (PDF) here.
The Five Stages of Project Grief
  Open Access Article (PDF) here.

 

Click here for Table-of-Contents