Dr.-Ing. Marvin Damschen

  • Scientist

Short Bio

Marvin Damschen received his Ph.D (Dr.-Ing.) in Computer Science from the Karlsruhe Institute of Technology (KIT), Germany, under the supervision of Prof. Dr. Jörg Henkel in Dec. 2018. Currently, he is a postdoctoral researcher at the Chair for Embedded Systems at KIT. His main research interests are timing analysis and architectures for heterogeneous real-time systems with special focus on runtime-reconfigurable architectures.
Marvin Damschen received a B.Sc. degree - with distinction - and M.Sc. degree - with distinction - in Computer Science with a minor in Mathematics from the University of Paderborn, Germany, in 2012 and 2014, respectively.


  • Doctoral Thesis:
    Worst-Case Execution Time Guarantees for Runtime-Reconfigurable Architectures PDF
  • Master Thesis:
    Easy-to-use on-the-fly binary program acceleration on many-cores PDF
  • Bachelor Thesis:
    Concurrent shared memory access for Android applications and real-time processes PDF


Enrico Rossi, Marvin Damschen, Lars Bauer, Giorgio Buttazzo, and Jörg Henkel
Preemption of the Partial Reconfiguration Process to Enable Real-Time Computing with FPGAs
in ACM Transactions on Reconfigurable Technology and Systems (TRETS) (Volume 11, Issue 2), DOI, PDF, Nov 2018.
Marvin Damschen, Frank Mueller, Jörg Henkel
Co-Scheduling on Fused CPU-GPU Architectures with Shared Last Level Caches
in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) (Volume 37, Issue 11), ESWEEK Special Issue, DOI, PDF, Nov 2018.
Marvin Damschen, Lars Bauer, Jörg Henkel
CoRQ: Enabling Runtime Reconfiguration under WCET Guarantees for Real-Time Systems
in IEEE Embedded Systems Letters (ESL) (Volume 9, Issue 1), DOI, PDF, Mar 2017.
Marvin Damschen, Lars Bauer, Jörg Henkel
Timing Analysis of Tasks on Runtime Reconfigurable Processors
in IEEE Transactions on Very Large Scale Integration Systems (TVLSI) (Volume 25, Issue 1), DOI, PDF, Jan 2017.
Marvin Damschen, Lars Bauer, Jörg Henkel
Extending the WCET Problem to Optimize for Runtime-Reconfigurable Processors
in ACM Transactions on Architecture and Code Optimization (TACO) (Volume 13, Issue 4), DOI, PDF, Dec 2016.
Marvin Damschen, Lars Bauer, Jörg Henkel
WCET Guarantees for Opportunistic Runtime Reconfiguration
in IEEE/ACM 38th International Conference on Computer-Aided Design (ICCAD), Westminster, CO, DOI, PDF, Nov 3-4 2019.
Lars Bauer, Marvin Damschen, Dirk Ziegenbein, Arne Hamann, Alessandro Biondi, Giorgio Buttazzo, Jörg Henkel
Analyses and Architectures for Mixed-Critical Systems: Industry Trends and Research Perspective (Special Session)
in International Conference on Embedded Software (EMSOFT’19), New York City, NY, USA, DOI, PDF, Oct 13-18 2019.
Tanja Harbaum, Christoph Schade, Marvin Damschen, Carsten Tradowsky, Lars Bauer, Jörg Henkel, Jürgen Becker
Auto-SI: An Adaptive Reconfigurable Processor with Run-time Loop Detection and Acceleration
in 30th IEEE International System-on-Chip Conference (SOCC), Munich, Germany, DOI, PDF, Sep 5-8 2017.
Lars Bauer, Artjom Grudnitsky, Marvin Damschen, Srinivas Rao Kerekare, Jörg Henkel
Floating Point Acceleration for Stream Processing Applications in Dynamically Reconfigurable Processors (invited special session paper)
in International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Amsterdam, The Netherlands, DOI, PDF, Oct 8-9 2015.
Books / Book Chapter
Marvin Damschen, Martin Rapp, Lars Bauer, Jörg Henkel
i-Core: A runtime-reconfigurable processor platform for cyber-physical systems
Chapter in Embedded, Cyber-Physical, and IoT Systems: Smart Cameras, Hardware/Software Co-Design, and Multimedia — Essays Dedicated to Marilyn Wolf on the Occasion of Her 60th Birthday, Springer International Publishing, DOI, PDF, 2020.
Marvin Damschen, Lars Bauer, Jörg Henkel
Worst-Case Execution Time Guarantees for Runtime-Reconfigurable Architectures
Ph.D. Forum at IEEE/ACM 22nd Design, Automation and Test in Europe Conference (DATE'19), Mar 25-29 2019.
Alexander Pöppl, Marvin Damschen, Florian Schmaus, Andreas Fried, Manuel Mohr, Matthias Blankertz, Lars Bauer, Jörg Henkel, Wolfgang Schröder-Preikschat, Michael Bader
Shallow Water Waves on a Deep Technology Stack: Accelerating a Finite Volume Tsunami Model using Reconfigurable Hardware in Invasive Computing
in 10th Workshop on UnConventional High Performance Computing (UCHPC), Santiago de Compostela, Spain, DOI, PDF, Aug 8-9 2017.
Stefan Wildermann, Michael Bader, Lars Bauer, Marvin Damschen, Dirk Gabriel, Michael Gerndt, Michael Glaß, Jörg Henkel, Johny Paul, Alexander Pöppl, Sascha Roloff, Tobias Schwarzer, Gregor Snelting, Walter Stechele, Jürgen Teich, Andreas Weichslgartner, Andreas Zwinkau
Invasive Computing for Timing-Predictable Stream Processing on MPSoCs
in it – Information Technology (IT), Band 58, Heft 6, DOI, PDF, Dec 2016.
PhD Thesis
Damschen, Marvin
Worst-Case Execution Time Guarantees for Runtime-Reconfigurable Architectures
Dissertationsschrift der Universität Karlsruhe, Fakultät für Informatik, Institut für Technische Informatik, DOI, PDF, 2018.

Student Theses

Finished Projects
NameType of workTitleMentorCompletion date
Tinkova, RositsaMaster thesisVideo processing pipeline for a reconfigurable accelerator frameworkDamschen, Marvin / Bauer, Lars2020-01-31
Brandt, TobiasMaster thesisA Streaming Network for a Mixed Criticality Architecture with Reconfigurable AcceleratorsDamschen, Marvin / Bauer, Lars2019-09-30
Beisswenger, JohannesBachelor thesisThe MIQARA Linux Driver: From Proof of Concept to PrototypeDamschen, Marvin / Bauer, Lars2019-07-22
Mladenov, NikolayBachelor thesisMulti-Core Taskscheduler for a SystemC-based Simulator of a Reconfigurable SystemDamschen, Marvin / Bauer, Lars2019-06-20
Waidler, AndreasMaster thesisA Runtime System Supporting Heterogeneous Reconfigurable Accelerators for the i-CoreBauer, Lars / Damschen, Marvin2018-05-07
Münchbach, FlorianMaster thesisDynamic I/O configuration in a partially reconfigurable accelerator frameworkDamschen, Marvin / Bauer, Lars2018-03-19
Vutov, PetarBachelor thesisA Linux Driver for the Reconfigurable Accelerator Queue ArchitectureDamschen, Marvin / Bauer, Lars2018-02-19
Sader, ThomasDiploma thesisLeveraging BCET Analysis to Improve WCET Estimates on Runtime Reconfigurable ProcessorsDamschen, Marvin2017-09-30
Maier, EduardDiploma thesisHeterogene Mehrkernprozessorunterstützung für i-CoreDamschen, Marvin / Bauer, Lars2017-09-30
Mehl, PatrickStudent research projectHeterogene Modulare SpezialbefehleBauer, Lars / Damschen, Marvin2017-06-27
Ben Ammar, KarimBachelor thesisDesign and Implentation of an IoT-based Control Device for an off-the-shelf Coffee MachineSamie, Farzad / Damschen, Marvin / Bauer, Lars2017-05-30
Blankertz, MatthiasDiploma thesisExtending the i-Core architecture for pipelined floating-point acceleratorsDamschen, Marvin / Bauer, Lars2017-03-31
Rapp, MartinMaster thesisA Mixed Criticality Architecture with Reconfigurable AcceleratorsDamschen, Marvin / Bauer, Lars2016-12-20
Eckhart, ArturBachelor thesisA Command-Driven Reconfiguration Controller for Hard Real-Time SystemsDamschen, Marvin / Bauer, Lars2016-08-12
Middelschulte, LeifMaster thesisExtending a WCET Estimation Tool for Runtime Reconfigurable ProcessorsDamschen, Marvin2016-07-14
Typke, MarcMaster thesisA SystemC/TLM-based Simulator for a Reconfigurable Heterogeneous Multi-core SystemDamschen, Marvin2016-04-15