Name | Titel | Mentor |
---|
Bin Asif, Abdullah | Enhancing Hardware Security for Reconfigurable Devices | Sajjad Hussain |
Buscher, Julian | Model Update Quality in Federated Learning | Pfeiffer, Kilian |
Dietrich, Benedikt | Reinforcement Learning for Many-Core Power-Thermal Management | Khdr, Heba / Sikal, Bakr |
Lorenz, Niklas | Security Accelerator for /i/-Core | Nassar, Hassan / Bauer, Lars |
Machauer, Philipp | FPGA Security | Nassar, Hassan / Bauer, Lars |
Müller, Rasmus | Federated Learning for Resource Management | Khdr, Heba |
Schmoltzi, Robert | Building a 'Fast Fully Homomorphic Encryption over the Torus' (TFHE)
Accelerator for FPGAs | Nassar, Hassan / Bauer, Lars |
Steiner, Daniel | Machine Learning / Thermal Modeling / Resource Management in Manycores | Mohammed Bakr Sikal and Heba Khdr |
Zhou, Kanran | Ressource Management on Chip | Khdr, Heba |
Name | Titel | Mentor |
---|
Abels, Raphael Leonard | Covert Channel Implementation | Gonzalez, Jeferson |
Al Khiati, Mohamed Adnane | ML-based Resource Management in 3D Processors | Sikal, Bakr |
Bothe, Simon | Homomorphic Encryption Accelerator | Nassar, Hassan / Bauer, Lars |
ElKoussy, Abdelrahman | Transfer Learning in Edge Computing | Khdr, Heba |
Ghayad, Mohamed | Resource Management for Edge Computing | Khdr, Heba |
Giakoumidakis, Nikolaos | approximate Multi Layer Perceptron | Zervakis, Georgios |
Götzfried, Erik | Writing NVM Energy-Efficiently | Siddhu, Lokesh / Bauer, Lars |
Hany, Islam | Demonstrator for GPU-based Thermal Covert Channel on an Embedded Platform | Gonzalez, Jeferson |
Helios, Benjamin | Hardware Implementation of a Machine Learning Algorithm | Faghih, Faeze / Bauer, Lars |
Malik, Arsalan | Extending the PUF Measurement Framework on FPGA | Nassar, Hassan / Bauer, Lars |
Megalaa, Martel | Developing an FPGA-based Emulation Platform with a RISC-V architecture for Writing NVM Energy-Efficiently | Siddhu, Lokesh |
Ourgani, Ayoub | ML-Based Detection of Malicious Modifications in the FPGA | Sajjad Hussain |
Shenouda, Mina | Developing an FPGA-based Emulation Platform with a RISC-V architecture for Writing NVM Energy-Efficiently | Siddhu, Lokesh |
Shokeir, Omar | Thermal Modeling of Multicore Processors | Sikal, Bakr |