
Hassan Nassar
- room: B2-317.1
- phone: +49 721 608-48780
- fax: +49 721 608-43962
- hassan nassar ∂does-not-exist.kit edu
- Haid-und-Neu-Str. 7
Bldg. 07.21
76131 Karlsruhe
Short Bio
Hassan Nassar joined the Chair for Embedded Systems in March 2020 as a research assistant. He received his B.Sc degree -with highest honours- from the German University in Cairo, Egypt in 2016, and his M.Sc degree from Ulm University, Germany in 2019.
Publications
Journals | |
---|---|
Nils Hölscher, Christian Hakert, Hassan Nassar, Kuan-Hsun Chen, Lars Bauer, Jian-Jia Chen, and Jörg Henkel Memory Carousel: LLVM-Based Bitwise Wear-Leveling for Non-Volatile Main Memory in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), DOI, PDF, early access 2023. | |
Hassan Nassar, Lars Bauer, and Jörg Henkel CaPUF: Cascaded PUF Structure for Machine Learning Resiliency in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD, Volume 41, Issue 11), DOI, PDF, Nov 2022. |
Conferences | |
---|---|
Hassan Nassar, Simon Pankner, Lars Bauer, Jörg Henkel Late Breaking Results: Configurable Ring Oscillators as a Side-Channel Countermeasure in 60th Design Automation Conference (DAC), San Francisco, Jul 9-13 (accepted) 2023. | |
Hassan Nassar, Hanna AlZughbi, Dennis Gnad, Lars Bauer, Mehdi Tahoori and Jörg Henkel LoopBreaker: Disabling Interconnects to Mitigate Voltage-Based Attacks in Multi-Tenant FPGAs in IEEE/ACM 40th International Conference On Computer Aided Design (ICCAD), Virtual Conference, DOI, PDF, Nov 1-5 2021. | |
Hassan Nassar, Lars Bauer and Jörg Henkel TiVaPRoMi: Time-Varying Probabilistic Row-Hammer Mitigation in IEEE/ACM 24th Design, Automation and Test in Europe Conference (DATE'21), Virtual Conference, DOI, PDF, Feb 1-5 2021. |
Student Theses
Abbreviation: B - Bachelor Thesis, M - Master Thesis
Topic | Type of work | Mentor |
---|---|---|
Dynamic Execution of Accelerators for a Run-Time Reconfigurable Processor (PDF) | B / M | Nassar, Hassan / Bauer, Lars |
Homomorphic Encryption Accelerator for Reconfigurable Systems (PDF) | B / M | Nassar, Hassan / Bauer, Lars |
Characterization of Physical Unclonable Func-tions (PUFs) (PDF) | B / M | Nassar, Hassan / Bauer, Lars |
Name | Type of work | Title | Mentor |
---|---|---|---|
Bothe, Simon | Bachelor thesis | Homomorphic Encryption Accelerator | Nassar, Hassan / Bauer, Lars |
Lorenz, Niklas | Master thesis | Security Accelerator for /i/-Core | Nassar, Hassan / Bauer, Lars |
Machauer, Philipp | Master thesis | FPGA Security | Nassar, Hassan / Bauer, Lars |
Malik, Arsalan | Bachelor thesis | Extending the PUF Measurement Framework on FPGA | Nassar, Hassan / Bauer, Lars |
Schmoltzi, Robert | Master thesis | Building a 'Fast Fully Homomorphic Encryption over the Torus' (TFHE) Accelerator for FPGAs | Nassar, Hassan / Bauer, Lars |
Name | Type of work | Title | Mentor | Completion date |
---|---|---|---|---|
Suhrkamp, Alexander | Hiwi | Support on Hardware Integration and Maintenance | Nassar, Hassan / Bauer, Lars | 2022-12-31 |
Kadel, Lars | Bachelor thesis | Protecting partial bitstreams for runtime reconfigurable systems using authenticated encryption | Nassar, Hassan / Bauer, Lars | 2022-12-19 |
Hering, Sascha | Master thesis | Security Enhancements for Reconfigurable Multi-Core Systems by means of Special Instruction Isolation | Nassar, Hassan / Bauer, Lars | 2022-11-28 |
Youssef, Rafik | Bachelor thesis | Dynamic Execution of Accelerators for a RunTime Reconfigurable Processor | Nassar, Hassan / Bauer, Lars | 2022-08-31 |
Pankner, Simon | Bachelor thesis | Seitenkanalschutz mittels Rauscherzeugung durch konfigurierbare Ringoszillatoren auf FPGAs | Nassar, Hassan / Bauer, Lars | 2022-05-13 |
Wang, Zhiyao | Master thesis | Investigating the Integration of Physical Unclonable Functions in Reconfigurable Systems | Nassar, Hassan | 2022-05-13 |
Bühner, Andreas | Master thesis | Implementierung eines Beschleunigers für die CNN Inferenz auf einem rekonfigurierbaren Prozessor | Nassar, Hassan / Bauer, Lars | 2022-05-13 |