Hassan Nassar

Hassan Nassar

  • Haid-und-Neu-Str. 7
    Bldg. 07.21
    76131 Karlsruhe

Short Bio

Hassan Nassar joined the Chair for Embedded Systems in March 2020 as a research assistant. He received his B.Sc degree -with highest honours- from the German University in Cairo, Egypt in 2016, and his M.Sc degree from Ulm University, Germany in 2019.

Publications

Journals
Nils Hölscher, Christian Hakert, Hassan Nassar, Kuan-Hsun Chen, Lars Bauer, Jian-Jia Chen, and Jörg Henkel
Memory Carousel: LLVM-Based Bitwise Wear-Leveling for Non-Volatile Main Memory
in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), DOI, PDF, early access 2023.
Hassan Nassar, Lars Bauer, and Jörg Henkel
CaPUF: Cascaded PUF Structure for Machine Learning Resiliency
in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD, Volume 41, Issue 11), DOI, PDF, Nov 2022.
Conferences
Hassan Nassar, Simon Pankner, Lars Bauer, Jörg Henkel
Late Breaking Results: Configurable Ring Oscillators as a Side-Channel Countermeasure
in 60th Design Automation Conference (DAC), San Francisco, Jul 9-13 (accepted) 2023.
Hassan Nassar, Hanna AlZughbi, Dennis Gnad, Lars Bauer, Mehdi Tahoori and Jörg Henkel
LoopBreaker: Disabling Interconnects to Mitigate Voltage-Based Attacks in Multi-Tenant FPGAs
in IEEE/ACM 40th International Conference On Computer Aided Design (ICCAD), Virtual Conference, DOI, PDF, Nov 1-5 2021.
Hassan Nassar, Lars Bauer and Jörg Henkel
TiVaPRoMi: Time-Varying Probabilistic Row-Hammer Mitigation
in IEEE/ACM 24th Design, Automation and Test in Europe Conference (DATE'21), Virtual Conference, DOI, PDF, Feb 1-5 2021.

Student Theses

Available Theses

Abbreviation: B - Bachelor Thesis, M - Master Thesis


TopicType of workMentor
Dynamic Execution of Accelerators for a Run-Time Reconfigurable Processor (PDF) B / MNassar, Hassan / Bauer, Lars
Homomorphic Encryption Accelerator for Reconfigurable Systems (PDF) B / MNassar, Hassan / Bauer, Lars
Characterization of Physical Unclonable Func-tions (PUFs) (PDF) B / MNassar, Hassan / Bauer, Lars
Ongoing Projects
NameType of workTitleMentor
Bothe, SimonBachelor thesisHomomorphic Encryption AcceleratorNassar, Hassan / Bauer, Lars
Lorenz, NiklasMaster thesisSecurity Accelerator for /i/-CoreNassar, Hassan / Bauer, Lars
Machauer, PhilippMaster thesisFPGA SecurityNassar, Hassan / Bauer, Lars
Malik, ArsalanBachelor thesisExtending the PUF Measurement Framework on FPGANassar, Hassan / Bauer, Lars
Schmoltzi, RobertMaster thesisBuilding a 'Fast Fully Homomorphic Encryption over the Torus' (TFHE) Accelerator for FPGAsNassar, Hassan / Bauer, Lars
Finished Projects
NameType of workTitleMentorCompletion date
Suhrkamp, AlexanderHiwiSupport on Hardware Integration and MaintenanceNassar, Hassan / Bauer, Lars2022-12-31
Kadel, LarsBachelor thesisProtecting partial bitstreams for runtime reconfigurable systems using authenticated encryptionNassar, Hassan / Bauer, Lars2022-12-19
Hering, SaschaMaster thesisSecurity Enhancements for Reconfigurable Multi-Core Systems by means of Special Instruction IsolationNassar, Hassan / Bauer, Lars2022-11-28
Youssef, RafikBachelor thesisDynamic Execution of Accelerators for a RunTime Reconfigurable ProcessorNassar, Hassan / Bauer, Lars2022-08-31
Pankner, SimonBachelor thesisSeitenkanalschutz mittels Rauscherzeugung durch konfigurierbare Ringoszillatoren auf FPGAsNassar, Hassan / Bauer, Lars2022-05-13
Wang, ZhiyaoMaster thesisInvestigating the Integration of Physical Unclonable Functions in Reconfigurable SystemsNassar, Hassan2022-05-13
Bühner, AndreasMaster thesisImplementierung eines Beschleunigers für die CNN Inferenz auf einem rekonfigurierbaren ProzessorNassar, Hassan / Bauer, Lars2022-05-13