Hassan Nassar
- room: B2-317.1
- phone: +49 721 608-48780
- fax: +49 721 608-43962
- hassan nassar ∂ kit edu
- Haid-und-Neu-Str. 7
Bldg. 07.21
76131 Karlsruhe
Short Bio
Hassan Nassar joined the Chair for Embedded Systems in March 2020 as a research assistant. He received his B.Sc degree -with highest honours- from the German University in Cairo, Egypt in 2016, and his M.Sc degree from Ulm University, Germany in 2019.
Publications
Journals | |
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Lars Bauer, Hassan Nassar, Nadir Khan, Jürgen Becker, and Jörg Henkel Machine-Learning-based Side-Channel Attack Detection for FPGA SoCs in IEEE Transactions on Circuits and Systems for Artificial Intelligence (TCAS-AI), Oct 2024. | |
Hassan Nassar, Jonas Krautter, Lars Bauer, Dennis Gnad, Mehdi
Tahoori and Jörg Henkel Meta-Scanner: Detecting Fault Attacks via Scanning FPGA Designs Metadata in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), ESWEEK24 Special Edition, Sep 2024 (ACCEPTED), 2024. | |
Lokesh Siddhu; Hassan Nassar; Lars Bauer; Christian Hakert; Nils Hölscher; Jian-Jia Chen; Jörg Henkel
Swift-CNN: Leveraging PCM Memory’s Fast Write Mode to Accelerate CNNs in IEEE Embedded Systems Letters (volume 14, Issue 4), DOI, PDF, Dec 2023. | |
Hassan Nassar, Lars Bauer, Jörg Henkel Effects of Runtime Reconfiguration on PUFs Implemented as FPGA-based Accelerators in Embedded Systems Letters (ESL), ESWEEK23 Special Edition (Volume 15, Issue 4), DOI, PDF, Dec 2023. | |
Hassan Nassar, Lars Bauer, Jörg Henkel ANV-PUF: Machine-Learning-Resilient NVM-Based Arbiter PUF in Transactions on Embedded Computing Systems (TECS), ESWEEK23 Special Edition, DOI, PDF, Sep 2023. | |
Nils Hölscher, Christian Hakert, Hassan Nassar, Kuan-Hsun Chen, Lars Bauer, Jian-Jia Chen, and Jörg Henkel Memory Carousel: LLVM-Based Bitwise Wear-Leveling for Non-Volatile Main Memory in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD, Volume 42, Issue 8), DOI, PDF, Aug 2023. | |
Hassan Nassar, Lars Bauer, and Jörg Henkel CaPUF: Cascaded PUF Structure for Machine Learning Resiliency in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD, Volume 41, Issue 11), DOI, PDF, Nov 2022. |
Conferences | |
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Hassan Nassar, Jeferson Gonzalez-Gomez, Varun Manjunath, Lars Bauer, and
Jörg Henkel Through Fabric: A Cross-world Thermal Covert Channel on TEE-enhanced FPGA-MPSoC Systems in 30th Asia and South Pacific Design Automation Conference (ASPDAC ’25) , (Accepted) 2025. | |
Jörg Henkel, Lokesh Siddhu, Hassan Nassar, Lars Bauer, Jian-Jia Chen, Christian Hakert, Tristan Seidl, Kuan-Hsun Chen, Xiaobo Sharon Hu, Mengyuan Li, Chia-Lin Yang, and Ming-Liang Wei (Invited Paper) Co-Designing NVM-based Systems for Machine Learning and In-memory Search Applications in International Conference on Computer-Aided Design (ICCAD), Oct 27-31 2024. | |
Hassan Nassar, Philipp Machauer, Lars Bauer, Dennis Gnad, Mehdi Tahoori and Jörg Henkel DoS-FPGA: Denial of Service on Cloud FPGAs via Coordinated Power Hammering in International Conference on Computer Aided Design (ICCAD), Oct 27-31 2024. | |
Lilas Alrahis, Hassan Nassar, Jonas Krautter, Dennis Gnad, Lars Bauer, Jörg Henkel and Mehdi Tahoori MaliGNNoma: GNN-Based Malicious Circuit Classifier for Secure Cloud FPGAs in 2024 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), Washington D.C., USA, DOI, PDF, May 6-9 2024. | |
Jeferson Gonzalez-Gomez, Hassan Nassar, Lars Bauer, Jörg Henkel (Short Paper) LightFAt: Mitigating Control-flow Explosion via Lightweight PMU-based Control-Flow Attestation in 2024 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), Washington D.C., USA, DOI, PDF, May 6-9 2024. | |
Hassan Nassar, Lars Bauer, Jörg Henkel HBMorphic: FHE Acceleration via HBM-Enabled Recursive Karatsuba Multiplier on FPGA in The 32nd IEEE International Symposium On Field-Programmable Custom Computing Machines (FCCM), Orlando, FL, USA, May 2024. | |
Hassan Nassar, Philipp Machauer, Dennis Gnad, Lars Bauer, Mehdi Tahoori and Jörg Henkel Covert-Hammer: Coordinating Power-Hammering on Multi-tenant FPGAs via Covert Channels (Poster) in ACM International Symposium on Field-Programmable Gate Arrays (ISFPGA), Monterey CA, USA, DOI, March 3-5 2024. | |
Hassan Nassar, Rafik Youssef, Lars Bauer, and Jörg Henkel Supporting Dynamic Control-Flow Execution for Runtime Reconfigurable Processors in IEEE International Conference on Microelectronics (ICM), Abu Dhabi, UAE, DOI, PDF, Dec 17-20 2023. | |
Hassan Nassar, Simon Pankner, Lars Bauer, Jörg Henkel Late Breaking Results: Configurable Ring Oscillators as a Side-Channel Countermeasure in 60th Design Automation Conference (DAC), San Francisco, DOI, PDF, Jul 9-13 2023. | |
Hassan Nassar, Hanna AlZughbi, Dennis Gnad, Lars Bauer, Mehdi Tahoori and Jörg Henkel LoopBreaker: Disabling Interconnects to Mitigate Voltage-Based Attacks in Multi-Tenant FPGAs in IEEE/ACM 40th International Conference On Computer Aided Design (ICCAD), Virtual Conference, DOI, PDF, Nov 1-5 2021. | |
Hassan Nassar, Lars Bauer and Jörg Henkel TiVaPRoMi: Time-Varying Probabilistic Row-Hammer Mitigation in IEEE/ACM 24th Design, Automation and Test in Europe Conference (DATE'21), Virtual Conference, DOI, PDF, Feb 1-5 2021. |
arXiv | |
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Jeferson Gonzalez-Gomez, Hassan Nassar, Lars Bauer, Jorg Henkel LightFAt: Mitigating Control-flow Explosion via Lightweight PMU-based Control-flow Attestation in arxiv, DOI, PDF, 2024. |
Books / Book Chapter | |
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Nidhi Anantharajaiah, Tamim Asfour, Michael Bader, Lars Bauer, Jürgen Becker, Simon Bischof, Marcel Brand, Hans-Joachim Bungartz, Christian Eichler, Khalil Esper, Joachim Falk, Nael Fasfous, Felix Freiling, Andreas Fried, Michael Gerndt, Michael Glaß, Jeferson Gonzalez, Frank Hannig, Christian Heidorn, Jörg Henkel, Andreas Herkersdorf, Benedict Herzog, Jophin John, Timo Hönig, Felix Hundhausen, Heba Khdr, Tobias Langer, Oliver Lenke, Fabian Lesniak, Alexander Lindermayr, Alexandra Listl, Sebastian Maier, Nicole Megow, Marcel Mettler, Daniel Müller-Gritschneder, Hassan Nassar, Fabian Paus, Alexander Pöppl, Behnaz Pourmohseni, Jonas Rabenstein, Phillip Raffeck, Martin Rapp, Santiago Narváez Rivas, Mark Sagi, Franziska Schirrmacher, Ulf Schlichtmann, Florian Schmaus, Wolfgang Schröder-Preikschat, Tobias Schwarzer, Mohammed Bakr Sikal, Bertrand Simon, Gregor Snelting, Jan Spieck, Akshay Srivatsa, Walter Stechele, Jürgen Teich, Furkan Turan, Isaías A. Comprés Ureña, Ingrid Verbauwhede, Dominik Walter, Thomas Wild, Stefan Wildermann, Mario Wille, Michael Witterauf, Li Zhang Invasive Computing in FAU University Press (Editors: Jürgen Teich, Jörg Henkel, Andreas Herkersdorf), DOI, PDF, Aug 2022. |
Student Theses
Abbreviation: B - Bachelor Thesis, M - Master Thesis
Topic | Type of work | Mentor |
---|---|---|
Homomorphic Encryption Accelerator for Reconfigurable Systems (PDF) | B / M | Nassar, Hassan / Bauer, Lars |
Characterization of Physical Unclonable Func-tions (PUFs) (PDF) | B / M | Nassar, Hassan / Bauer, Lars |
Porting Reconfigurable Framework to RISC-V (PDF) | M | Nassar, Hassan |
Name | Type of work | Title | Mentor | Completion date |
---|---|---|---|---|
Lim, Vincent | Master thesis | Homomorphic Encryption | Nassar, Hassan | 2024-03-31 |
Hanna, Nevin | Bachelor thesis | SNNs on FPGA | Nassar, Hassan | 2024-02-29 |
Lorenz, Niklas | Master thesis | Accelerating a Post-Quantum-Secure Hash Function on a Runtime Reconfigurable Processor | Nassar, Hassan / Bauer, Lars | 2023-10-01 |
Machauer, Philipp | Master thesis | Covert-Channel Exploitation for Coordinated Power-Hammering on Multi-tenant FPGAs | Nassar, Hassan / Bauer, Lars | 2023-09-30 |
Manjunath, Varun | Internship | Side-channel Detection on FPGA | Nassar, Hassan | 2023-08-15 |
Schmoltzi, Robert | Master thesis | Building a 'Fast Fully Homomorphic Encryption over the Torus' (TFHE) Accelerator for FPGAs | Nassar, Hassan / Bauer, Lars | 2023-08-01 |
Malik, Arsalan | Hiwi | Supporting on the Design of FPGA-learning Course | Nassar, Hassan / Bauer, Lars | 2023-06-30 |
Malik, Arsalan | Bachelor thesis | Characterization of Physical Unclonable Functions on FPGAs | Nassar, Hassan / Bauer, Lars | 2023-06-30 |
Bothe, Simon | Bachelor thesis | Construction of a Hardware-Accelerated Somewhat-Homomorphic Encryption System | Nassar, Hassan / Bauer, Lars | 2023-06-30 |
Suhrkamp, Alexander | Hiwi | Support on Hardware Integration and Maintenance | Nassar, Hassan / Bauer, Lars | 2022-12-31 |
Kadel, Lars | Bachelor thesis | Protecting partial bitstreams for runtime reconfigurable systems using authenticated encryption | Nassar, Hassan / Bauer, Lars | 2022-12-19 |
Hering, Sascha | Master thesis | Security Enhancements for Reconfigurable Multi-Core Systems by means of Special Instruction Isolation | Nassar, Hassan / Bauer, Lars | 2022-11-28 |
Youssef, Rafik | Bachelor thesis | Dynamic Execution of Accelerators for a RunTime Reconfigurable Processor | Nassar, Hassan / Bauer, Lars | 2022-08-31 |
Pankner, Simon | Bachelor thesis | Seitenkanalschutz mittels Rauscherzeugung durch konfigurierbare Ringoszillatoren auf FPGAs | Nassar, Hassan / Bauer, Lars | 2022-05-13 |
Wang, Zhiyao | Master thesis | Investigating the Integration of Physical Unclonable Functions in Reconfigurable Systems | Nassar, Hassan | 2022-05-13 |
Bühner, Andreas | Master thesis | Implementierung eines Beschleunigers für die CNN Inferenz auf einem rekonfigurierbaren Prozessor | Nassar, Hassan / Bauer, Lars | 2022-05-13 |