Hassan Nassar

Hassan Nassar

  • Haid-und-Neu-Str. 7
    Bldg. 07.21
    76131 Karlsruhe

Short Bio

Hassan Nassar joined the Chair for Embedded Systems in March 2020 as a research assistant. He received his B.Sc degree -with highest honours- from the German University in Cairo, Egypt in 2016, and his M.Sc degree from Ulm University, Germany in 2019.

Publications

Journals
Lars Bauer, Hassan Nassar, Nadir Khan, Jürgen Becker, and Jörg Henkel
Machine-Learning-based Side-Channel Attack Detection for FPGA SoCs
in IEEE Transactions on Circuits and Systems for Artificial Intelligence (TCAS-AI), DOI, PDF, Early Access 2024.
Hassan Nassar, Jonas Krautter, Lars Bauer, Dennis Gnad, Mehdi Tahoori and Jörg Henkel
Meta-Scanner: Detecting Fault Attacks via Scanning FPGA Designs Metadata
in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD, Volume 43, Issue 11), DOI, PDF, Nov 2024.
Lokesh Siddhu; Hassan Nassar; Lars Bauer; Christian Hakert; Nils Hölscher; Jian-Jia Chen; Jörg Henkel
Swift-CNN: Leveraging PCM Memory’s Fast Write Mode to Accelerate CNNs
in IEEE Embedded Systems Letters (Volume 14, Issue 4), DOI, PDF, Dec 2023.
Hassan Nassar, Lars Bauer, Jörg Henkel
Effects of Runtime Reconfiguration on PUFs Implemented as FPGA-based Accelerators
in Embedded Systems Letters (ESL), ESWEEK23 Special Edition (Volume 15, Issue 4), DOI, PDF, Dec 2023.
Hassan Nassar, Lars Bauer, Jörg Henkel
ANV-PUF: Machine-Learning-Resilient NVM-Based Arbiter PUF
in Transactions on Embedded Computing Systems (TECS), ESWEEK23 Special Edition, DOI, PDF, Sep 2023.
Nils Hölscher, Christian Hakert, Hassan Nassar, Kuan-Hsun Chen, Lars Bauer, Jian-Jia Chen, and Jörg Henkel
Memory Carousel: LLVM-Based Bitwise Wear-Leveling for Non-Volatile Main Memory
in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD, Volume 42, Issue 8), DOI, PDF, Aug 2023.
Hassan Nassar, Lars Bauer, and Jörg Henkel
CaPUF: Cascaded PUF Structure for Machine Learning Resiliency
in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD, Volume 41, Issue 11), DOI, PDF, Nov 2022.
Conferences
Hassan Nassar, Jeferson Gonzalez-Gomez, Varun Manjunath, Lars Bauer, and Jörg Henkel
Through Fabric: A Cross-world Thermal Covert Channel on TEE-enhanced FPGA-MPSoC Systems
in 30th Asia and South Pacific Design Automation Conference (ASPDAC ’25) , (Accepted) 2025.
Jayeeta Chaudhuri, Hassan Nassar, Dennis R.E. Gnad, Jörg Henkel, Mehdi B. Tahoori, and Krishnendu Chakrabarty
Hacking the Fabric: Targeting Partial Reconfiguration for Fault Injection in FPGA Fabrics
in The 33rd IEEE Asian Test Symposium (ATS 2024), Ahmedabad, Gujarat, India, Dec 17-20 2024.
Jörg Henkel, Lokesh Siddhu, Hassan Nassar, Lars Bauer, Jian-Jia Chen, Christian Hakert, Tristan Seidl, Kuan-Hsun Chen, Xiaobo Sharon Hu, Mengyuan Li, Chia-Lin Yang, and Ming-Liang Wei
(Invited Paper) Co-Designing NVM-based Systems for Machine Learning and In-memory Search Applications
in International Conference on Computer-Aided Design (ICCAD), Oct 27-31 2024.
Hassan Nassar, Philipp Machauer, Lars Bauer, Dennis Gnad, Mehdi Tahoori and Jörg Henkel
DoS-FPGA: Denial of Service on Cloud FPGAs via Coordinated Power Hammering
in International Conference on Computer Aided Design (ICCAD), Oct 27-31 2024.
Lilas Alrahis, Hassan Nassar, Jonas Krautter, Dennis Gnad, Lars Bauer, Jörg Henkel and Mehdi Tahoori
MaliGNNoma: GNN-Based Malicious Circuit Classifier for Secure Cloud FPGAs
in 2024 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), Washington D.C., USA, DOI, PDF, May 6-9 2024.
Jeferson Gonzalez-Gomez, Hassan Nassar, Lars Bauer, Jörg Henkel
(Short Paper) LightFAt: Mitigating Control-flow Explosion via Lightweight PMU-based Control-Flow Attestation
in 2024 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), Washington D.C., USA, DOI, PDF, May 6-9 2024.
Hassan Nassar, Lars Bauer, Jörg Henkel
HBMorphic: FHE Acceleration via HBM-Enabled Recursive Karatsuba Multiplier on FPGA
in The 32nd IEEE International Symposium On Field-Programmable Custom Computing Machines (FCCM), Orlando, FL, USA, May 2024.
Hassan Nassar, Philipp Machauer, Dennis Gnad, Lars Bauer, Mehdi Tahoori and Jörg Henkel
Covert-Hammer: Coordinating Power-Hammering on Multi-tenant FPGAs via Covert Channels (Poster)
in ACM International Symposium on Field-Programmable Gate Arrays (ISFPGA), Monterey CA, USA, DOI, March 3-5 2024.
Hassan Nassar, Rafik Youssef, Lars Bauer, and Jörg Henkel
Supporting Dynamic Control-Flow Execution for Runtime Reconfigurable Processors
in IEEE International Conference on Microelectronics (ICM), Abu Dhabi, UAE, DOI, PDF, Dec 17-20 2023.
Hassan Nassar, Simon Pankner, Lars Bauer, Jörg Henkel
Late Breaking Results: Configurable Ring Oscillators as a Side-Channel Countermeasure
in 60th Design Automation Conference (DAC), San Francisco, DOI, PDF, Jul 9-13 2023.
Hassan Nassar, Hanna AlZughbi, Dennis Gnad, Lars Bauer, Mehdi Tahoori and Jörg Henkel
LoopBreaker: Disabling Interconnects to Mitigate Voltage-Based Attacks in Multi-Tenant FPGAs
in IEEE/ACM 40th International Conference On Computer Aided Design (ICCAD), Virtual Conference, DOI, PDF, Nov 1-5 2021.
Hassan Nassar, Lars Bauer and Jörg Henkel
TiVaPRoMi: Time-Varying Probabilistic Row-Hammer Mitigation
in IEEE/ACM 24th Design, Automation and Test in Europe Conference (DATE'21), Virtual Conference, DOI, PDF, Feb 1-5 2021.
arXiv
Jeferson Gonzalez-Gomez, Hassan Nassar, Lars Bauer, Jorg Henkel
LightFAt: Mitigating Control-flow Explosion via Lightweight PMU-based Control-flow Attestation
in arxiv, DOI, PDF, 2024.
Books / Book Chapter
Nidhi Anantharajaiah, Tamim Asfour, Michael Bader, Lars Bauer, Jürgen Becker, Simon Bischof, Marcel Brand, Hans-Joachim Bungartz, Christian Eichler, Khalil Esper, Joachim Falk, Nael Fasfous, Felix Freiling, Andreas Fried, Michael Gerndt, Michael Glaß, Jeferson Gonzalez, Frank Hannig, Christian Heidorn, Jörg Henkel, Andreas Herkersdorf, Benedict Herzog, Jophin John, Timo Hönig, Felix Hundhausen, Heba Khdr, Tobias Langer, Oliver Lenke, Fabian Lesniak, Alexander Lindermayr, Alexandra Listl, Sebastian Maier, Nicole Megow, Marcel Mettler, Daniel Müller-Gritschneder, Hassan Nassar, Fabian Paus, Alexander Pöppl, Behnaz Pourmohseni, Jonas Rabenstein, Phillip Raffeck, Martin Rapp, Santiago Narváez Rivas, Mark Sagi, Franziska Schirrmacher, Ulf Schlichtmann, Florian Schmaus, Wolfgang Schröder-Preikschat, Tobias Schwarzer, Mohammed Bakr Sikal, Bertrand Simon, Gregor Snelting, Jan Spieck, Akshay Srivatsa, Walter Stechele, Jürgen Teich, Furkan Turan, Isaías A. Comprés Ureña, Ingrid Verbauwhede, Dominik Walter, Thomas Wild, Stefan Wildermann, Mario Wille, Michael Witterauf, Li Zhang
Invasive Computing
in FAU University Press (Editors: Jürgen Teich, Jörg Henkel, Andreas Herkersdorf), DOI, PDF, Aug 2022.

Student Theses

Available Theses

Abbreviation: B - Bachelor Thesis, M - Master Thesis


TopicType of workMentor
Homomorphic Encryption Accelerator for Reconfigurable Systems (PDF) B / MNassar, Hassan / Bauer, Lars
Characterization of Physical Unclonable Func-tions (PUFs) (PDF) B / MNassar, Hassan / Bauer, Lars
Porting Reconfigurable Framework to RISC-V (PDF) MNassar, Hassan
Ongoing Projects
NameType of workTitleMentor
Akalin, YagmurBachelor thesisFPGA-Accelerated CloudsNassar, Hassan
Zwerschke, JanBachelor thesisPUF Investigation on FPGAsNassar, Hassan
Finished Projects
NameType of workTitleMentorCompletion date
Lim, VincentMaster thesisHomomorphic EncryptionNassar, Hassan2024-03-31
Hanna, NevinBachelor thesisSNNs on FPGANassar, Hassan2024-02-29
Lorenz, NiklasMaster thesisAccelerating a Post-Quantum-Secure Hash Function on a Runtime Reconfigurable ProcessorNassar, Hassan / Bauer, Lars2023-10-01
Machauer, PhilippMaster thesisCovert-Channel Exploitation for Coordinated Power-Hammering on Multi-tenant FPGAsNassar, Hassan / Bauer, Lars2023-09-30
Manjunath, VarunInternshipSide-channel Detection on FPGANassar, Hassan2023-08-15
Schmoltzi, RobertMaster thesisBuilding a 'Fast Fully Homomorphic Encryption over the Torus' (TFHE) Accelerator for FPGAsNassar, Hassan / Bauer, Lars2023-08-01
Malik, ArsalanHiwiSupporting on the Design of FPGA-learning CourseNassar, Hassan / Bauer, Lars2023-06-30
Malik, ArsalanBachelor thesisCharacterization of Physical Unclonable Functions on FPGAsNassar, Hassan / Bauer, Lars2023-06-30
Bothe, SimonBachelor thesisConstruction of a Hardware-Accelerated Somewhat-Homomorphic Encryption SystemNassar, Hassan / Bauer, Lars2023-06-30
Suhrkamp, AlexanderHiwiSupport on Hardware Integration and MaintenanceNassar, Hassan / Bauer, Lars2022-12-31
Kadel, LarsBachelor thesisProtecting partial bitstreams for runtime reconfigurable systems using authenticated encryptionNassar, Hassan / Bauer, Lars2022-12-19
Hering, SaschaMaster thesisSecurity Enhancements for Reconfigurable Multi-Core Systems by means of Special Instruction IsolationNassar, Hassan / Bauer, Lars2022-11-28
Youssef, RafikBachelor thesisDynamic Execution of Accelerators for a RunTime Reconfigurable ProcessorNassar, Hassan / Bauer, Lars2022-08-31
Pankner, SimonBachelor thesisSeitenkanalschutz mittels Rauscherzeugung durch konfigurierbare Ringoszillatoren auf FPGAsNassar, Hassan / Bauer, Lars2022-05-13
Wang, ZhiyaoMaster thesisInvestigating the Integration of Physical Unclonable Functions in Reconfigurable SystemsNassar, Hassan2022-05-13
Bühner, AndreasMaster thesisImplementierung eines Beschleunigers für die CNN Inferenz auf einem rekonfigurierbaren ProzessorNassar, Hassan / Bauer, Lars2022-05-13