lpACLib: An Open-Source Library for Low-Power Approximate Computing Modules


Introduction and Short Description

“lpACLib” is an open-source library for Low-Power Approximate Computing Modules (like adders and multiplier of different bit-widths) available for download at: https://sourceforge.net/projects/lpaclib/.

It contains both synthesizable VHDL description and behavioral implementations in C (MATLAB implementations in progress). Besides our novel designs, it also contains implementations for several state-of-the-art arithmetic modules and their approximate versions and their area, power, and quality characterization. One of the key purposes of this open-source library is to facilitate research and development in approximate computing at higher abstraction levels, and to facilitate reproducible research and comparisons. For instance, these approximate arithmetic modules in different combinations can be used to develop novel approximate accelerators or more complex approximate circuits. This will also save precious research and development time, and will eliminate the huge amount of redundancy in the typical design work-flow of approximate blocks (the non-trivial task of re-implementing state-of-the-art).



In case of usage, please refer to our corresponding DAC 2016 publication:

Muhammad Shafique, Rehan Hafiz, Semeen Rehman, Walaa El-Harouni, Jörg Henkel, "A Low Latency Generic Accuracy Configurable Adder", in 53nd ACM/EDAC/IEEE Design Automation Conference & Exhibition (DAC), 2016.



The “lpACLib” library contains the VHDL description of accurate and approximate versions of several arithmetic modules and accelerators. Moreover, it also provides the corresponding software behavioral models/implementations developed in C (MATLAB implementations in progress) to enable quality characterization.

This library contains the following components.

State-of-the-Art Implementations:

  1. P. Kulkarni, P. Gupta and M. Ercegovac, “Trading Accuracy for Power with an Underdesigned Multiplier Architecture”, in 24th International Conference on VLSI Design, Chennai, India, 2011, pp. 346-351.
  2. V. Gupta, D. Mohapatra, S. P. Park, A. Raghunathan and K. Roy, “IMPACT: IMPrecise adders for low-power approximate computing“, in International Symposium on Low Power Electronics and Design (ISLPED), Fukuoka, Japan, 2011, pp. 409-414.
  3. V. Gupta, D. Mohapatra, A. Raghunathan and K. Roy, “Low-Power Digital Signal Processing Using Approximate Adders“, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 32, no. 1, pp. 124-137, Jan. 2013.


We have implemented these designs as per the truth tables provided in the paper. Results may differ depending upon the implementation style, synthesis configuration, and used technology.

List of Implementations (more will be coming soon…):
The library includes the following new designs (The complete list is given in the “readme.txt” file in the HW folder. Also see the Snapshot)

  1. Accurate 1-bit and multi-bit adders
  2. Five approximate 1-bit adder and several multi-bit adders
  3. Accurate 2x2, 4x4, 8x8, 16x16 multipliers
  4. Two approximate designs for 2x2 multipliers and their accuracy configurable versions.
  5. Approximate 4x4, 8x8, 16x16 multipliers using accurate adders for partial product summation
  6. Other approximate multiplier designs using mixes of approximate adders and 2x2 multipliers
  7. Accurate and different approximate designs of SAD (Sum of Absolute Differences) accelerator


In future, we will keep extending this library with more components and more state-of-the-art implementations. We cordially welcome other research groups, researchers, and developers to contribute to this open-source library, extend it with more design options and implementations, or even refine the existing designs and provide different synthesis configurations and results. In this regard, please contact Dr. Muhammad Shafique (swahlah∂yahoo.com) for more discussion.


Detailed Comments

  • See the “readme” file under the HW folder for detailed comments related to the hardware circuits.
  • Each file lists all the necessary files (sub-circuits) needed for its compilation.
  • Testbenches are provided for several circuits “testbench.vhd“. These may require editing depending upon the tool environment and settings.
  • “pt_script.tcl” is for running primetime power analysis tool. Appropriate places in the file that require editing before a run are marked.
  • “script.tcl” is for running Synopsys Design Compiler for area and power analysis. Appropriate places in the file that require editing before a run are marked.
  • Note: for SAD circuits the files are different as they include clocking for delay analysis.