Short Bio:

Georgios Zervakis received the Diploma and Ph.D. degrees from the School of Electrical and Computer Engineering (ECE), National Technical University of Athens (NTUA), Greece, in 2012 and 2018, respectively. He is currently a research assistant and group leader at the Chair for Embedded Systems (CES), at the Karlsruhe Institute of Technology (KIT). Before joining KIT, he was a postdoctoral research fellow at Microprocessors Laboratory and Digital Systems Lab (Microlab), ECE, NTUA. In addition, he has worked as a research associate at the Aristotle University of Thessaloniki (AUTH), the National and Kapodistrian University of Athens (UOA), and as a principal investigator at the Institute of Communication and Computer Systems (ICCS), Greece. As a member of ICCS, he worked in several European projects including among others the AEGLE, FABSPACE 2.0, and EXA2PRO.

Research Interests:

Approximate computing
Design automation and synthesis
Neural Network accelerators
Hardware acceleration in cloud

Publications

Journals
S. Salamin, G. Zervakis, F. Klemme, H. Kattan, Y. Chauhan, J. Henkel, and H. Amrouch Impact of NCFET Technology on Eliminating the Cooling Cost and Boosting the Efficiency of Google TPU in IEEE Transactions on Computers, DOI, PDF, early access 2021. Guilherme Paim, Georgios Zervakis, Girish Pahwa, Yogesh S. Chauhan, Eduardo A. C. da Costa, Sergio Bampi, Jörg Henkel, and Hussam Amrouch On the Resiliency of NCFET Circuits against Voltage Over-Scaling in IEEE Transactions on Circuits and Systems I: Regular Papers, DOI, PDF, early access 2021. Georgios Zervakis, Iraklis Anagnostopoulos, Sami Salamin, Yogesh S. Chauhan, Jörg Henkel, Hussam Amrouch Impact of NCFET on Neural Network Accelerators in IEEE Access (Vol. 9), DOI, PDF, Mar 2021. Hussam Amrouch, Georgios Zervakis, Sami Salamin, Hammam Kattan, Iraklis Anagnostopoulos and Jörg Henkel NPU Thermal Management in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), ESWEEK Special Issue, DOI, PDF, Nov 2020. Zois-Gerasimos Tasoulas, Georgios Zervakis, Iraklis Anagnostopoulos, Hussam Amrouch, Jörg Henkel Weight-Oriented Approximation for Energy-Efficient Neural Network Inference Accelerators in IEEE Transactions on Circuits and Systems I: Regular Papers, DOI, PDF, Sep 2020. Georgios Zervakis, Hussam Amrouch and Jörg Henkel Design Automation of Approximate Circuits With Runtime Reconfigurable Accuracy in IEEE Access (Vol. 8), DOI, PDF, Mar 2020.

Journals

S. Salamin, G. Zervakis, F. Klemme, H. Kattan, Y. Chauhan, J. Henkel, and H. Amrouch
Impact of NCFET Technology on Eliminating the Cooling Cost and Boosting the Efficiency of Google TPU
in IEEE Transactions on Computers, DOI, PDF, early access 2021.

Guilherme Paim, Georgios Zervakis, Girish Pahwa, Yogesh S. Chauhan, Eduardo A. C. da Costa, Sergio Bampi, Jörg Henkel, and Hussam Amrouch
On the Resiliency of NCFET Circuits against Voltage Over-Scaling
in IEEE Transactions on Circuits and Systems I: Regular Papers, DOI, PDF, early access 2021.

Georgios Zervakis, Iraklis Anagnostopoulos, Sami Salamin, Yogesh S. Chauhan, Jörg Henkel, Hussam Amrouch
Impact of NCFET on Neural Network Accelerators
in IEEE Access (Vol. 9), DOI, PDF, Mar 2021.

Hussam Amrouch, Georgios Zervakis, Sami Salamin, Hammam Kattan, Iraklis Anagnostopoulos and Jörg Henkel
NPU Thermal Management
in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), ESWEEK Special Issue, DOI, PDF, Nov 2020.

Zois-Gerasimos Tasoulas, Georgios Zervakis, Iraklis Anagnostopoulos, Hussam Amrouch, Jörg Henkel
Weight-Oriented Approximation for Energy-Efficient Neural Network Inference Accelerators
in IEEE Transactions on Circuits and Systems I: Regular Papers, DOI, PDF, Sep 2020.

Georgios Zervakis, Hussam Amrouch and Jörg Henkel
Design Automation of Approximate Circuits With Runtime Reconfigurable Accuracy
in IEEE Access (Vol. 8), DOI, PDF, Mar 2020.

Conferences
G. Zervakis, O. Spantidi, I. Anagnostopoulos, H. Amrouch, and J. Henkel Control Variate Approximation for DNN Accelerators in 58th Design Automation Conference (DAC), (accepted) July 11-15 2021. Mikail Yayla, Kuan-Hsun Chen, Georgios Zervakis, Jörg Henkel, Jian-Jia Chen, and Hussam Amrouch FeFET and NCFET for Future Neural Networks: Visions and Opportunities (special session) in 24th Design, Automation and Test in Europe Conference (DATE'21), Virtual Conference, Feb 1-5 2021. Sami Salamin, Georgios Zervakis, Ourania Spantidi, Iraklis Anagnostopoulos, Jörg Henkel and Hussam Amrouch Reliability-Aware Quantization for Anti-Aging NPUs in IEEE/ACM 24th Design, Automation and Test in Europe Conference (DATE'21), Virtual Conference, Feb 1-5 2021. Georgios Zervakis, Hassaan Saadat, Hussam Amrouch, Andreas Gerstlauer, Sri Parameswaran, and Jörg Henkel Approximate Computing for ML: State-of-the-art, Challenges and Visions (special session) in 26th Asia and South Pacific Design Automation Conference (ASPDAC ’21), DOI, PDF, Jan 18-21 2021.

Conferences

Control Variate Approximation for DNN Accelerators

in 58th Design Automation Conference (DAC)

FeFET and NCFET for Future Neural Networks: Visions and Opportunities (special session)

in 24th Design, Automation and Test in Europe Conference (DATE'21), Virtual Conference

Reliability-Aware Quantization for Anti-Aging NPUs

in IEEE/ACM 24th Design, Automation and Test in Europe Conference (DATE'21), Virtual Conference

Approximate Computing for ML: State-of-the-art, Challenges and Visions (special session)

in 26th Asia and South Pacific Design Automation Conference (ASPDAC ’21)

DOI

PDF

Previous publications

Journals
G. Zervakis, K. Koliogeorgi, D. Anagnostos, N. Zompakis, and K. Siozios VADER: VoltageDriven Netlist Pruning for CrossLayer Approximate Arithmetic Circuits in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 27, no. 6, pp. 1460–1464, DOI, Jun. 2019.
G. Zervakis, S. Xydis, D. Soudris, and K. Pekmestzi, MultiLevel Approximate Accelerator Synthesis Under Voltage Island Constraints in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 4, pp. 607–611, DOI, Apr. 2019.
V. Leon, G. Zervakis, S. Xydis, D. Soudris, and K. Pekmestzi Walking through the EnergyError Pareto Frontier of Approximate Multipliers in IEEE Micro, vol. 38, no. 4, pp. 40–49, DOI, Jul. 2018.
G. Zervakis, F. Ntouskas, S. Xydis, D. Soudris, and K. Pekmestzi VOSsim: A Framework for Enabling Fast Voltage Overscaling Simulation for Approximate Computing Circuits in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 6, pp. 1204–1208, DOI, Jun. 2018.
V. Leon, G. Zervakis, D. Soudris, and K. Pekmestzi Approximate Hybrid High Radix Encoding for EnergyEfficient Inexact Multipliers in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 3, pp. 421–430, DOI, Mar. 2018.
G. Zervakis, K. Tsoumanis, S. Xydis, D. Soudris, and K. Pekmestzi DesignEfficient Approximate Multiplication Circuits Through Partial Product Perforation in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 10, pp. 3105–3117, DOI, Oct. 2016.
K. Tsoumanis, N. Axelos, N. Moschopoulos, G. Zervakis, and K. Pekmestzi PreEncoded Multipliers Based on NonRedundant Radix4 SignedDigit Encoding in IEEE Transactions on Computers, vol. 65, no. 2, pp. 670–676, DOI, Feb. 2016.
K. Tsoumanis, S. Xydis, G. Zervakis, and K. Pekmestzi Flexible DSP Accelerator Architecture Exploiting CarrySave Arithmetic in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 1, pp. 368–372, DOI, Jan. 2016.

Conferences
K. Koliogeorgi, G. Zervakis, D. Anagnostos, N. Zompakis, and K. Siozios Optimizing SVM Classifier Through Approximate and High Level Synthesis Techniques in 2019 8th International Conference on Modern Circuits and Systems Technologies (MOCAST), IEEE, 2019, pp. 1–4. DOI.
D. Masouros, K. Koliogeorgi, G. Zervakis, A. Kosvyra, A. Chytas, S. Xydis, I. Chouvarda, and D. Soudris Codesign implications of costeffective ondemand acceleration for cloud healthcare analytics: The aegle approach in 2019 Design, Automation Test in Europe Conference Exhibition (DATE), 2019, pp. 622–625. DOI.
N. Zompakis, D. Anagnostos, K. Koliogeorgi, G. Zervakis, and K. Siozios A Design Flow Framework for FullyConnected Neural Networks Rapid Prototyping in Proceedings of the International Conference on OmniLayer Intelligent Systems, ACM, 2019, pp. 44–49. DOI:.
K. Koliogeorgi, D. Masouros, G. Zervakis, S. Xydis, T. Becker, G. Gaydadjiev, and D. Soudris AEGLE’s Cloud Infrastructure for Resource Monitoring and Containerized Accelerated Analytics in 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Jul. 2017, pp. 362–367. DOI.
G. Zervakis, S. Xydis, and D. Soudris Performancepower exploration of softwaredefined big data analytics: The AEGLE cloud backend in 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), IEEE, Jul. 2016, pp. 312–319. DOI.
N. Eftaxiopoulos, N. Axelos, G. Zervakis, K. Tsoumanis, and K. Pekmestzi Delta DICE: A Double Node Upset resilient latch in 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS), Aug. 2015, pp. 1–4. DOI.
G. Zervakis, S. Xydis, K. Tsoumanis, D. Soudris, and K. Pekmestzi Hybrid approximate multiplier architectures for improved poweraccuracy tradeoffs in 2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), Jul. 2015, pp. 79–84. DOI.
G. Zervakis, K. Tsoumanis, S. Xydis, N. Axelos, and K. Pekmestzi Approximate Multiplier Architectures Through Partial Product Perforation: PowerArea Tradeoffs Analysis in Proceedings of the 25th Edition on Great Lakes Symposium on VLSI (GLSVLSI), ACM, 2015, pp. 229–232. DOI.
N. Eftaxiopoulos, N. Axelos, G. Zervakis, K. Tsoumanis, and K. Pekmestzi An independent dual gate SOI FinFET softerror resilient memory cell in 2014 9th International Design and Test Symposium (IDT), IEEE, Dec. 2014, pp. 39–44. DOI.
N. Eftaxiopoulos, G. Zervakis, K. Pekmestzi, and C. Efstathiou High performance MAC designs in 2014 9th International Design and Test Symposium (IDT), IEEE, Dec. 2014, pp. 30–35. DOI.
G. Zervakis, N. Eftaxiopoulos, K. Tsoumanis, N. Axelos, and K. Pekmestzi A high radix montgomery multiplier with concurrent error detection in 2014 9th International Design and Test Symposium (IDT), IEEE, Dec. 2014, pp. 199–204. DOI.
N. Axelos, N. Eftaxiopoulos, G. Zervakis, K. Tsoumanis, and K. Pekmestzi FFDICE: An 8T softerror tolerant cell using Independent Dual Gate SOI FinFETs in 2014 IEEE 20th International OnLine Testing Symposium (IOLTS), Jul. 2014, pp. 200–201. DOI.
G. Zervakis, N. Eftaxiopoulos, K. Tsoumanis, N. Axelos, and K. Pekmestzi A segmentationbased BISR scheme in 2014 19th Asia and South Pacific Design Automation Conference (ASPDAC), Jan. 2014, pp. 652–657. DOI.
N. EftaxiopoulosSarris, G. Zervakis, K. Tsoumanis, and K. Pekrnestzi A radiation tolerant and selfrepair memory cell in 2013 IEEE 19th International OnLine Testing Symposium (IOLTS), Jul. 2013, pp. 210–215. DOI.

Book Chapters
C. Kachris, E. Koromilas, I. Stamelos, G. Zervakis, S. Xydis, and D. Soudris EnergyEfficient Acceleration of Spark Machine Learning Applications on FPGAs C. Kachris, B. Falsafi, and D. Soudris, Eds. Cham: Springer International Publishing, 2019, pp. 87–107. DOI.
G. Zervakis On Accelerating Data Analytics: An Introduction to the Approximate Computing Technique K. Siozios, D. Anagnostos, D. Soudris, and E. Kosmatopoulos, Eds. Cham: Springer International Publishing, 2019, pp. 163–180. DOI.