Magazine
Volume 34, Issue 6 (November/December)
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Highlights
Special Issue on "Self-Aware Systems on Chip" |
Survey on "Self-Awareness in Systems on Chip - A Survey" |
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Survey Paper by Angelos Antonopoulos, Christiana Kapatsori, and Yiorgos Makris "Trusted Analog/Mixed- Signal/RF ICs: A Survey and a Perspective" |
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Perspective by Lothar Thiele, " Internet of Things—The Quest for Trust" |
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Perspective by Patrick Mayor, Martin Rajman, and Giovanni De Micheli, " Nano-Tera.ch: Information Technology for Health, Environment, and Energy" |
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Report by Maria K. Michael and Haralampos-G. Stratigopoulos, "Recap of the European Test Symposium 2017 (ETS’17)" |
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Report by David Garrett and Chia-Lin Yang, "Recap of the 2017 International Symposium on Low Power Electronics and Design (ISLPED)" |
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November/December 2017 Content
From the EIC
Self-Aware On-Chip Systems
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Self-Awareness in Systems on Chip — A Survey |
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Editor’s note: Self-awareness is a desirable feature of emerging computing systems. It helps systems to understand, manage, and report on their own system behavior.... read more
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Health Management for Self-Aware SoCs Based on IEEE 1687 Infrastructure |
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Motivated by the need to tolerate faults, this paper presents a complete fault management solution that includes fault detection and categorization, maintaining a map of faults, and modified scheduling and application algorithms for using healthy resources only... read more
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KOCL: Power Self- Awareness for Arbitrary FPGA-SoC-Accelerated OpenCL Applications |
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Being aware of its own power consumption is essential for any system under power constraints, i.e. all systems with moderate or high complexity. This paper describes a tool that provides this power awareness for applications written in OpenCL and implemented on FPGAs... read more.
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A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors |
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As technology edges closer to fundamental limits, variations of process parameters, operational voltage, and temperature (PVT variations) have to be accounted for. This paper proposes to make higher levels aware of these variations and bring them under system control by using software controlled body biasing... read more
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Self-Adaptive Timing Repair |
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This article describes a method to continuously monitor paths delays in an operational FPGA design and to improve slow paths by incremental partial reconfiguration. Since online delay measuring is more accurate than design time estimation, this approach... read more
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Survey Paper
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Trusted Analog/Mixed- Signal/RF ICs: A Survey and a Perspective |
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The trustworthiness of integrated circuits is now an essential technical and business challenge for the semiconductor industry. In the digital domain, there has been extensive activity in understanding and counteracting the threats of hardware Trojans, piracy and counterfeiting... read more
View full article (PDF). |
General Interest Papers
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Layout-Aware Optimized Prebond Silicon Interposer Test Synthesis |
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The authors target the typical problem of a small number of test access ports. As a solution, they propose a set of interposers to obtain access to the tested nets... read more
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Adaptive ECC for Tailored Protection of Nanoscale Memory |
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Following technology scaling, runtime failure has emerged as one of the major challenges in modern VLSI designs under the increased parametric variability and low supply voltage. This issue is especially severe in nanoscale memory due to its high density and large capacity... read more
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Low-Power Sparse Hyperdimensional Encoder for Language Recognition |
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Online learning for data analysis, categorization and anomaly detection has become a key technique in a range of adaptive embedded applications. In this article the authors propose a very low power encoder design... read more
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