Abstract:
Large-scale search plays a crucial role in a broad range of data analytics applications, where achieving fast and energy-efficient search is highly desirable. However, accelerating search at scale remains challenging due to massive data volumes and irregular memory access patterns. In-memory computing architectures—particularly non-volatile memory (NVM)-based content addressable memory (CAM)—have emerged as a promising approach for efficient search acceleration, enabling massively parallel lookups with reduced energy consumption. Realizing the full potential of CAM-based accelerators, however, requires careful co-design across devices, circuits, architectures, systems and algorithms.

This talk explores how design choices at different abstraction layers impact the efficiency, scalability, and performance of CAM-based search accelerators. It discusses key design challenges, trade-offs, and representative solutions. By connecting advances across devices, circuits, and systems, the talk provides practical insights for researchers and designers developing next-generation search accelerators that can efficiently meet the demands of increasingly large and complex search workloads.

Bio:
Xiaobo Sharon Hu is Leo E. and Patti Ruth Linbeck Professor of Engineering in the department of Computer Science and Engineering at the University of Notre Dame, USA. Her research interests include low-power and reliable system design, circuit and architecture design with emerging technologies, real-time embedded systems, and hardware-software co-design. She has published more than 500 papers in these areas and received best paper awards from top design automation conferences. She served as the General Chair and/or TPC Chair of Design Automation Conference, Real-Time Systems Symposium, Embedded Systems Week, etc. She was the Editor-in-Chief of ACM Transactions on Design Automation of Electronic Systems and served as Associate Editor of other ACM and IEEE journals. Sharon Hu is a Fellow of the ACM and the IEEE.