TALK: Thermal-Aware Design of 2D/3D Many-Core Servers with Inter-Tier Liquid Cooling
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Speaker:Prof. David Atienza, 
 École polytechnique fédérale de Lausanne (EPFL), Switzerland
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Time:July 7th, 2014, 4:00pm 
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Location:FZI, 
 Room: New York,
 Karlsruhe
Abstract 
Continuous advances in manufacturing technologies are enabling  the development of more powerful and compact high-performance computing  servers made of 2D and 3D multi-processor system-on-chip (MPSoC)  designs. However, 3D stacking originates higher power and heat  densities, leading to degraded performance in high-performance computing  if cooling is not handled properly at all levels of abstraction. In this  talk, I first describe a new framework for detailed system-level thermal  modeling of 2D/3D MPSoC including inter-tier microchannels. Then, I will  describe a new family of global hardware/software temperature  controllers for energy-efficient 2D/3D MPSoC cooling. These novel  controllers include a thermal-aware job scheduler, which balances the  temperature across the system to maximize cooling efficiency.  Furthermore, this new generation of system-level temperature balancing  controllers forecast maximum system temperature, and uses this forecast  to proactively set the cooling system. Hence, the proposed controller  avoids over- or under-cooling due to delays in reacting to temperature  changes. The experiments on modeled 2- and 4-layered 3D MPSoCs show that  this proposed global cooling controller prevents enables up to 80%  energy savings with respect to state-of-the-art computing systems  designs in future datacenters. Finally, I will outline how the  combination of inter-tier liquid cooling technologies and 3D computing  architectures design can overcome the problem of dark silicon and energy  proportionality deployment in future generations of many-core servers  and datacenters.    
Short Bio
David Atienza is associate professor of EE and director of the Embedded  Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and  PhD degrees in computer science and engineering from UCM, Spain, and  IMEC, Belgium, in 2001 and 2005, respectively. His research interests  focus on system-level design methodologies for 2D and 3D multi-processor  Systems-on-Chip (MPSoC) and low-power embedded systems. He has  co-authored more than 200 publications in prestigious journals and  international conferences, several book chapters and six U.S. patents. 
He has earned several best paper awards at top venues in electronic  design automation and computer and system engineering; he received the  IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New  Faculty Award in 2012 and a Faculty Award from Sun Labs at Oracle in  2011. He is a Distinguished Lecturer (2014-2015) of the IEEE CASS, and  was GOLD member of the Board of Governors of IEEE CASS from 2010 to  2012. He is Senior Member of IEEE and ACM.
 
                