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IEEE Design&Test Vol. 34, Issue 2

  • Speaker:
    Special Issue on Computing in the Dark Silicon Era
  • Location:

    IEEE Explorer

  • Date: March/April
Design & Test

Magazine
Volume 34, Issue 2 (March/April)

Highlights
Special Issue on "Computing in the Dark Silicon Era"  
Perspective by Marilyn Wolf, "The Physics of Event-Driven IoT Systems"
In Memoriam, Edward J. McCluskey 1929-2016
(Free Access)

March/April 2017 Content


From the EIC
Power Density
  View full article (PDF).

Computing in the Dark Silicon Era
Guest Editors' Introduction: Computing in the Dark Silicon Era
  View full article (PDF).
Computing in the Dark Silicon Era: Current Trends and Research Challenges
  Power density has become the major constraint for many on-chip designs. As an introduction to the Special Issue on Dark Silicon, the authors ... read more.
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Near Threshold Voltage (NTV) Computing: Computing in the Dark Silicon Era
  Near-threshold computing has emerged as an attractive paradigm for energy efficiency. This article discusses ... read more.
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Impact of FinFET on Near-Threshold Voltage Scalability
  Near-threshold operations provide a powerful knob for improving energy efficiency and alleviating on-chip power densities. This article ... read more.
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Dark Memory and Accelerator-Rich System Optimization in the Dark Silicon Era
  Unlike traditional dark silicon works that attack the computing logic, this article puts a focus on the memory part, which dissipates most of the energy for memory-bound CPU applications. This article discusses ... read more.
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Can Dark Silicon Be Exploited to Prolong System Lifetime?
  Besides stringent power and thermal constraints, a dark silicon chip is also subjected to various reliability threats. This article illustrates ... read more.
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AxBench: A Multiplatform Benchmark Suite for Approximate Computing
  Approximate computing is claimed to be a powerful knob for alleviating the peak power and energy-efficiency issues. However, ... read more.
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General Interest Papers
Controller Architecture for Low-Power, Low-Latency DRAM With Built-in Cache
  Memory wall is a critical issue for many today's electronic systems. Tiered latency DRAM with asymmetric bit lines was proposed to optimize the power and latency. This paper proposes ... read more.
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A Fully Automated and Configurable Cost-Aware Framework for Adaptive Functional Diagnosis
  This paper presents an approach that enables users to tune the board diagnosis process in order to trade off ... read more.
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Departments
The Physics of Event-Driven IoT Systems
  View article (PDF).
Highlights of ICCAD 2016
  Free Access Article (PDF).
Edward J. McCluskey 1929-2016
  Free Access Article (PDF).
Dark Silicon, Antiparallelism, and Too Much Work
  Free Access Article (PDF).

 

Table-of-Contents