Memory Management for Scalable Many-Core Architectures

  • Speaker:
    Prof. Nikil Dutt

    Center for Embedded Computer Systems, University of California, Irvine

  • Location:

    KIT building 50.41
    Room 145/146,
    Karlsruhe

  • Date: June 17th, 2013, 10:30am

Abstract:
Technology scaling along with the growing demand for media-rich software stacks have motivated the need for many-core platforms. With the increase in compute power and its inherent demand for high memory bandwidth comes the need for vast amounts of on-chip memory space. Thus, designers must carefully provision the limited on-chip memory budget to meet their application's needs.
Embedded systems often use both software controlled memories (e.g., scratchpad memories) and hardware-controlled memories (e.g., caches), with each having their pros and cons. Efficient on-chip memory management is extremely critical as it has a great impact on the system's power consumption and throughput. Traditional memory hierarchies primarily consist of SRAM-based on-chip caches, however, with the emergence of non-volatile memories (NVMs) and mixed-criticality systems, we expect to see heterogeneous on-chip memory hierarchies, not only in type (cache vs. scratchpad) but also in technology (e.g., SRAM vs. NVM).
This talk will survey the state of the art in memory subsystems for many-core platforms, and presents strategies for efficiently managing software-controlled memories in the many-core domain, while addressing emerging challenges faced by designers, and will also propose a holistic software/hardware solution to managing the memory subsystem for scalable many-core architectures.

Short Bio:
Nikil Dutt is a Chancellor's Professor of CS, Cognitive Sciences, and EECS at the University of California, Irvine. He received a PhD from the University of Illinois at Urbana-Champaign (1989).
His research interests are in embedded systems design automation, computer architecture, optimizing compilers, system specification techniques, distributed embedded systems, and brain-inspired architectures and computing.
He has received numerous best paper awards and is coauthor of 7 books.
Professor Dutt served as EiC of ACM TODAES (2003-2008) and currently serves as AE for ACM TECS and for IEEE TVLSI. He has served on the steering, organizing, and program committees of several premier CAD and Embedded System Design conferences and workshops, and serves or has served on the advisory boards of ACM SIGBED and ACM SIGDA. Professor Dutt is a Fellow of the IEEE, an ACM Distinguished Scientist, and recipient of the IFIP Silver Core Award.

 

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