Magazine
Volume 35, Issue 5 (September/October)
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Highlights
| Special Issue on "Self-Aware Systems on Chip" |
| General Interest Paper by Alfonso Alongi, Giuseppe Vitello, Salvatore Vitabile and Vincenzo Conti, "An Empirical Set of Metrics for Embedded Systems Testing" |
| General Interest Paper by Pietro Fezzardi, Fabrizio Ferrandi and Christian Pilato, "Enabling Automated Bug Detection for IP-Based Designs Using High-Level Synthesis" |
| Tutorial by Felix Freiling, Tobias Groß, Tobias Latzo, Tilo Müller and Ralph Palutke, "Advances in Forensic Data Acquisition" |
| Conference Report by X. Sharon Hu "The 55th Design Automation Conference" |
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September/October 2018 Content
From the EIC
Self-Aware Systems on Chip Part II
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Self-Test and Diagnosis for Self-Aware Systems |
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Self-testing hardware has a long tradition as a complement to manufacturing testing based on test stimuli and response analysis. read more
View full article (PDF). |
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Self-Aware Network-on-Chip Control in Real-Time Systems |
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This article identifies the contradictory needs for dynamic adaptations and full predictability in complex, exacting applications like autonomous driving. read more
View full article (PDF). |
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Self-Aware Thermal Management for High-Performance Computing Processors |
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Editor’s note:Thermal management in high-performance multicore platforms has become exceedingly complex due to variable workloads, thermal heterogeneity, and long, thermal transients. read more.
View full article (PDF). |
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Run-Time Adaptive Power-Aware Reliability Management for Manycores |
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Due to increasing process, voltage, and temperature (PVT) variability, reliability is becoming a growing worry. read more
View full article (PDF). |
General Interest Papers
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An Empirical Set of Metrics for Embedded Systems Testing |
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Editor's note: Selecting the right platform for an embedded system is a challenging task, because there are no systematic methodologies for comprehensive evaluation and comparison of competing alternatives. read more
View full article (PDF). |
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Enabling Automated Bug Detection for IP-Based Designs Using High-Level Synthesis |
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This article presents an automated approach for detecting system- level bugs in SoC designs that are composed of many IP blocks, without exposing sensitive information. read more
View full article (PDF). |
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