Side channel Attacks, Remote Power Attacks and Countermeasures

  • Speaker:
    Prof. Sri Paramesvaran

    The University of Sydney, Australia

  • Location:

    CES Seminar room

  • Date: Mar. 28th, 2025, 1:00 pm

Abstract:
Deep devastation is felt when privacy is breached, personal information is lost, or property is stolen. Now imagine when all of this happens at once, and the victim is unaware of its occurrence until much later. This is the reality, as an increasing number of electronic devices are used as keys, wallets and files. Security attacks targeting embedded systems illegally gain access to information or destroy information. Advanced Encryption Standard (AES) is used to protect many of these embedded systems. While mathematically shown to be quite secure, it is now well known that AES circuits and software implementations are vulnerable to side channel attacks. Side-channel attacks are performed by observing properties of the system (such as power consumption, electromagnetic emission, etc.) while the system performs cryptographic operations. In this talk, differing power-based attacks are described, and various countermeasures are explained. A countermeasure titled Algorithmic Balancing is described in detail. Implementation of this countermeasure in hardware and software is described. Since process variation impairs countermeasures, we show how this countermeasure can be made to overcome process variations. In the next part of the talk, Remote power attacks are described, and novel sensors are demonstrated which enable stealthy deployment of attacks on Cloud based FPGAs (such as the Amazon Cloud FPGA).

Brief Bio:
Sri Parameswaran is the Head of School of Electrical and Information Engineering at the University of Sydney. Prior to that he was a Professor in the School of Computer Science and Engineering at the University of New South Wales. He also served as the Program Director for Computer Engineering. His research interests are in System Level Synthesis, Low power systems, High Level Systems, Security, Genomic Systems and Network on Chips. He served as the Editor in Chief of the IEEE Embedded Systems Letters, and has served on the editorial boards of IEEE Transactions on Computer Aided Design, ACM Transactions on Embedded Computing Systems, the EURASIP Journal on Embedded Systems and the Design Automation of Embedded Systems. He has served on the Program Committees of Design Automation Conference (DAC), Design and Test in Europe (DATE), the International Conference on Computer Aided Design (ICCAD), the International Conference on Hardware/Software Code- sign and System Synthesis (CODES-ISSS), and the International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES).